Rework interrupt handling, realign stuff for relative jumps
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e4dec4b14c
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@ -1,3 +1,34 @@
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; Register a interrupt handler (21h AH=25h)
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; in: AL interrupt number
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; DS:DX far ptr
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isr_intr_register:
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; backup previous stos ptr
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push es
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push di
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; DI = AL * 4
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mov ah, 4
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mul ah
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mov di, ax
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; ES = 0
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xor ax, ax
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mov es, ax
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; store offset
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mov ax, dx
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stosw
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; store segment
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mov ax, ds
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stosw
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; restore previous stos ptr
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pop di
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pop es
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iret
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; Register a interrupt handler
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; in: AL interrupt number
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; ES:DI far ptr to routine/data
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@ -1,45 +1,18 @@
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cpu 8086
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org 0x0100
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push cs
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pop es
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mov di, isr_dos_main
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mov ax, 0x21
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call intr_register
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int3
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cli
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.halt:
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hlt
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jmp .halt
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jmp init
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isr_dos_main:
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; Bail out if subfunction number too high
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cmp ah, 0x0F
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jnc isr_invalid
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cmp ah, 0x01
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je isr_getc_echo
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cmp ah, 0x02
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je isr_putc
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jmp isr_invalid
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; allocate our return address
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push bx
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; actual BX backup
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push bx
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%include "chario.asm"
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%include "intr.asm"
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; transfer subfunction number into BX
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xor bx, bx
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mov bl, ah
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; table offset = AH * 2
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shl bx, 1
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; fetch from table
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mov bx, [dos_functions+bx]
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; inject our address into the stack
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add sp, 4
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push bx
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sub sp, 2
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; restore BX
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pop bx
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; reads our address from the stack and jumps there
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ret
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%include "cache.asm"
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; ISR for invalid subfunctions or unimplemented
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isr_invalid:
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@ -58,31 +31,21 @@ isr_error:
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isr_return:
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iret
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; Table for DOS subfunctions
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dos_functions:
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; AH 00-03
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dw isr_invalid
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dw isr_getc_echo
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dw isr_putc
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dw isr_invalid
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; AH 04-07
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dw isr_invalid
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dw isr_invalid
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dw isr_invalid
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dw isr_invalid
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; AH 08-0B
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dw isr_invalid
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dw isr_invalid
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dw isr_invalid
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dw isr_invalid
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; AH 0C-0F
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dw isr_invalid
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dw isr_invalid
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dw isr_invalid
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dw isr_invalid
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init:
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push cs
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pop es
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mov di, isr_dos_main
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mov ax, 0x21
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call intr_register
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%include "intr.asm"
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mov di, kernel_end
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call cache_init
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%include "chario.asm"
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int3
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cli
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.halt:
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hlt
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jmp .halt
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kernel_end:
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